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Overview of the program

Subject
AREA SCIENTIFICA-TECNOLOGICA
Credits
60
Department/Institution
DIPARTIMENTO DI INGEGNERIA INDUSTRIALE E DELL'INFORMAZIONE
in collaborazione con la Fondazione Chips-IT
Duration
one-year
Fees
6.000 €
Application dates
from 10/11/2025 to 13/02/2026
Study format
blended
Available places
from 8 to 25
Duration courses
from April 2026 to January 2027
Auditors
No
Language
English

The Post-Master Vocational Program aims to provide solid skills in the field of Microelectronics to individuals who are already knowledgeable in this area and individuals who have not gained insights into these topics, even though they may have developed similar skills. The course is designed to broaden the training offered in the field of Microelectronics, in light of the increasing diffusion of microelectronic devices in systems of all kinds (domestic, industrial, etc.).

Obiettivo del Master è di creare una rete di collaborazione, sempre più ampia ed internazionale, nel settore della Microelettronica che veda Pavia come proprio baricentro, data la presenza:

The purpose of the Vocational Program is to create an increasingly wide and international collaboration networking in the field of Microelectronics, with Pavia acting as a key hub, given the presence of:

  • a Doctorate of National Interest in Micro- and Nano-Electronics
  • the Chips-IT Foundation
  • the University-led Microelectronics District Partnership, involving major national and international companies, such as Allegro Microsystems, Ams-OSRAM Italy, Analog Devices, ASR Microelectronics, Cadence, Eskube, Marvell, Huawei, Infineon Technologies Italy, Invensense-TDK Italy, Inventvm Semiconductor, Monolithic Power Systems, NXP, On- Semi, Orca Semiconductor, Photeon Technologies, Renesas, Siae Microelectronica, Siemens, Synopsis and STMicroelectronics.

The Vocational Program will be taught entirely in English, with internationally renowned lecturers.

Graduates of the Vocational Program will be qualified to work in all institutions involved in integrated circuit development, including:

  • universities
  • research centres
  • Microelectronics companies, with the Milan-Pavia area being home to a large number of them,

making the course unique at an European level.

1) RF DESIGN

Introduction

IINF-01/A | Elettronica
Language: English
CFU: 3
Contents:
  • Basics of RF Circuits.

Case 1

IINF-01/A | Elettronica
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of an LNA&Mixer Block.

Case 2

IINF-01/A | Elettronica
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of a Frequency Synthesizer Block.

Lab

IINF-01/A | Elettronica
Language: English
CFU: 5
Contents:
  • Laboratory Experience in RF Design.

2) MIXED-SIGNAL DESIGN

Introduction

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 3
Contents:
  • Basics of Mixed-Signal Circuits.

Case 1

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of an ADC.

Case 2

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of a DC-DC Converter.

Lab

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 5
Contents:
  • Laboratory Experience in Mixed-Signal Design.

3) DIGITAL DESIGN

Introduction

IINF-01/A | Elettronica
Language: English
CFU: 3
Contents:
  • Basics of Digital Circuits and Systems.

Case 1

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of a Digital Block no. 1.

Case 2

IINF-01/A | Elettronica
Language: English
CFU: 2
Contents:
  • Design Consideration for the Development of a Digital Block no. 2.

Lab

IINF-01/A | Elettronica
Language: English
CFU: 5
Contents:
  • Laboratory Experience in Digital Circuits and Systems.

4) CAD

IINF-01/A | Elettronica
Language: English
CFU: 3
Contents:
  • Expert of CAD

5) ANALOG SIGNAL PROCESSING

IINF-01/A | Elettronica
Language: English
CFU: 2
Contents:
  • Use of different Analog Signal Processing Techniques.

6) INTEGRATED CIRCUIT TECHNOLOGIES

IINF-01/A | Elettronica
Language: English
CFU: 4
Contents:
  • Different Features for Different Applications.

7) IC MANAGEMENT AND BUSINESS ORGANIZATION

IMIS-01/B | Misure elettriche ed elettroniche
Language: English
CFU: 2
Contents:
  • Management Aspects of the Development and Production of an IC.

Other activities

  • Internship/Stage

    Language:
    English
    CFU:
    12

  • Final exam

    Language:
    English
    CFU:
    1

Information notice

Participation by students in the various training activities will be structured as follows:

  • online participation is planned for the first two periods
  • in-person participation in Pavia is planned for the third period for intensive design workshops. During this phase, highly advanced, qualified, and well-recognized teaching and research workshops will be organized in Italy and abroad at the Department of Industrial and Information Engineering
  • during the fourth period, in-person participation is expected as part of an internship to be carried out at a partner company of the Vocational Program.
(LM-20) Classe delle lauree magistrali in Ingegneria aerospaziale e astronautica
(LM-21) Classe delle lauree magistrali in Ingegneria biomedica
(LM-25) Classe delle lauree magistrali in Ingegneria dell'automazione
(LM-27) Classe delle lauree magistrali in Ingegneria delle telecomunicazioni
(LM-28) Classe delle lauree magistrali in Ingegneria elettrica
(LM-29) Classe delle lauree magistrali in Ingegneria elettronica
(LM-30) Classe delle lauree magistrali in Ingegneria energetica e nucleare
(LM-31) Classe delle lauree magistrali in Ingegneria gestionale
(LM-32) Classe delle lauree magistrali in Ingegneria informatica

Ordinamenti previgenti e altri titoli di studio accettati/eccezioni:


(25/S) Classe delle lauree specialistiche in ingegneria aerospaziale e astronautica
(26/S) Classe delle lauree specialistiche in ingegneria biomedica
(29/S) Classe delle lauree specialistiche in ingegneria dell'automazione
(30/S) Classe delle lauree specialistiche in ingegneria delle telecomunicazioni
(31/S) Classe delle lauree specialistiche in ingegneria elettrica
(32/S) Classe delle lauree specialistiche in ingegneria elettronica
(33/S) Classe delle lauree specialistiche in ingegneria energetica e nucleare
(34/S) Classe delle lauree specialistiche in ingegneria gestionale
(35/S) Classe delle lauree specialistiche in ingegneria informatica

<p>The Organizational Secretary will be based at:</p>

<p>Dipartimento di Ingegneria Industriale e dell'Informazione<br />
Via A. Ferrata, 5 - 27100 Pavia (PV)<br />
E: nicoletta.galli@unipv.it<br />
PH: + 39 0382.98.5898.</p>

<p> </p>

Annex